CPU Configuration
• 1k × 13 bits on chip ROM
• 32 × 8 bits on-chip registers (SRAM, general
purpose)
• 5 level stacks for subroutine nesting
• Less than 1.5 mA at 5V / 4MHz
• Typically 15 μA at 3V / 32kHz
• Typically 1 μA during Sleep mode
&#; I/O Port Configuration
• 2 bidirectional I/O ports : P5, P6
• 12 I/O pins
• Wake-up port : P6
• 6 Programmable pull-down I/O pins
• 7 programmable pull-high I/O pins
• 7 programmable open-drain I/O pins
• External interrupt : P60
&#; Operating Voltage Range:
• 2.3V ~ 5.5V at 0 ~ 70°C (Commercial Grade)
&#; Operating Frequency Range (Base on 2 clocks):
• Crystal Mode:
DC ~ 20MHz / 2clks @ 5V
DC ~ 8MHz / 2clks @ 3V
DC ~ 4MHz / 2clks @ 2.3V
The transient point of system frequency
between HXT and LXT is 400kHz.
• ERC Mode:
DC ~ 2MHz / 2clks @ 2.1V
• IRC Mode:
Oscillation Mode: 4 / 8 / 1MHz and 455kHz
Process Deviation: Type: Max. ± 3%
Temperature Deviation: ± 2% (0 ~ 70°C)
Drift Rate
Internal
RC Freq. Temp.
(0~70°C) Voltage Process Total
4 MHz ±1.5% ±8%@2.3~5.5V ±2% ±11.5%
8 MHz ±1.5% ±8%@3.0~5.5V ±2% ±11.5%
1 MHz ±1.5% ±8%@2.3~5.5V ±2% ±11.5%
455kHz ±1.5% ±8%@2.3~5.5V ±2% ±11.5%
&#; Peripheral Configuration
• 8-bit real time clock / counter (TCC) with selective
signal sources, trigger edges, and overflow
interrupt
• Power on reset and 3 programmable level voltage
reset
POR: 1.8V (Default), LVR: 4.0, 3.5, 2.7V
• 2- / 4 clocks per instruction cycle selected by code
option
&#; Three Available Interrupts:
• TCC overflow interrupt
• Input-port status changed interrupt (Wake-up from
Sleep mode)
• External interrupt
&#; Special Features
• Programmable free running watchdog timer
• Power saving Sleep mode
• Selectable oscillation mode
• Programmable prescaler of oscillator set-up time
&#; Package Type:
• 14-pin DIP 300mil : EM78P153BD14J
• 14-pin SOP 150mil : EM78P153BSO14J
• 10-pin SSOP 150mil : EM78P153BSS10J
孙小姐：、QQ：
