Overview
1.1 Features
• Operating voltage range: 3.0V~5.5V at -40°C~85°C (industrial)
• Operating frequency range (base on 2 clocks):
Only IRC: 16 MHz, 8 MHz, 4 MHz
* RC mode: DC ~ 16 MHz/2clks, 4.5V; DC ~ 8 MHz/2clks @ 3V
* Accuracy of IRC frequency for 4 MHz, 8 MHz and 16 MHz is at ± 2.5% at 25oC
• Low power consumption:
* Less than 3 mA at 5V / 4 MHz
* Typically 2 μA, during sleep mode
• 4K × 13 bits on-chip ROM
• 208 × 8 bits on-chip registers (SRAM)
• 3 bidirectional I/O ports
• 8-level stacks for subroutine nesting
• 2 programmable Level Voltage Reset (LVR): 4V, 3.3V
• 8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and overflow interrupt
• (11+1)-bit multi-channel Analog-to-Digital Converter with 12-bit resolution (1 channel is connected
internally to OPout) for the 24-pin package
• One Pulse-mode PWM (PPWM) with 10-bit resolution and special function, or one Pulse Width
Modulation (PWM)
• Four comparators (one can act as an OP). The Cin+ end for two of the four comparators can be
connected to an internal reference and the offset voltage is 5 mV. The offset of high voltage comparator
(8V) is 5 mV. The OP has 5 mV offset voltage as the Cin+ is connected to ground.
• Internal reference voltage: 0.4, 0.5, 0.6, 0.7VDD ± 1% at 25°C
• Configurable edge interrupt for all comparators
• Buzzer (Fc/212, Fc/211, Fc/210, Fc/24)
• Power-down (Sleep) mode
• Six available interrupts:
* TCC overflow interrupt
* Input-port status changed interrupt (wake-up from sleep mode)
* External interrupt
* ADC completion interrupt
* PWM period match completion
* Comparator high/low interrupt
• Programmable free running watchdog timer
• 8 Programmable pull-down I/O pins
• 7 programmable pull-high I/O pins
• 8 programmable open-drain I/O pins
• Two clocks per instruction cycle
• Package types:
* CKM005K24J 24-pin Skinny DIP 300mil
* CKM005D20J 20-pin DIP 300mil
• Power-on voltage detector available (2.7V release, 2.6V reset)
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